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PRELIMINARY
Integrated Circuit Systems, Inc.
ICS8520
LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER
FEATURES
* 16 differential 3.3V LVHSTL outputs each with the ability to drive 50 to ground * 1 differential CLK, nCLK input pair * CLK, nCLK pair can accept the following differential input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL * Maximum output frequency up to 500MHz * Translates single ended input levels to LVHSTL levels with resistor bias nCLK input * Output skew: 50ps (maximum) * Part-to-part skew: 250ps (maximum) * Propagation delay: 1.6ns (maximum) * VOH: 1.2V (maximum) * 40% of VOH Vcrossover 60% of VOH * 3.3V core, 1.8V output operating supply voltages * 0C to 70C ambient operating temperature
GENERAL DESCRIPTION
The ICS8520 is a low skew, high performance 1-to-16 Differential-to-3.3V LVHSTL Fanout Buffer HiPerClockSTM and a member of the HiPerClockSTM family of High Performance Clock Solutions from ICS. The ICS8520 has 1 clock input pair. The CLK, nCLK pair can accept most standard differential input levels.
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Guaranteed output skew, part-to-part skew and crossover voltage characteristics make the ICS8520 ideal for interfacing to today's most advanced microprocessor and static RAMs.
BLOCK DIAGRAM
CLK nCLK
PIN ASSIGNMENT
nCLK VCCO Q15 nQ15 Q14 nQ14 GND Q13 nQ13 Q12 nQ12 VCCO
Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Q4 nQ4 Q5 nQ5 Q6 nQ6 Q7 nQ7
Q15 nQ15 Q14 nQ14 Q13 nQ13 Q12 nQ12 Q11 nQ11 Q10 nQ10 Q9 nQ9 Q8 nQ8
VCCO Q11 nQ11 Q10 nQ10 GND Q9 nQ9 Q8 nQ8 VCCO VCC
48 47 46 45 44 43 42 41 40 39 38 37 1 36 2 35 3 34 4 33 5 32 6 31 7 30 8 29 9 28 10 27 11 26 12 25 13 14 15 16 17 18 19 20 21 22 23 24
ICS8520
CLK VCCO nQ0 Q0 nQ1 Q1 GND nQ2 Q2 nQ3 Q3 VCCO
48-Lead LQFP 7mm x 7mm x 1.4mm body package Y Package Top View
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. ICS8520DY www.icst.com/products/hiperclocks.html REV. B JULY 5, 2001 1
VCCO nQ4 Q4 nQ5 Q5 GND nQ6 Q6 nQ7 Q7 VCCO VCC
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS8520
LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER
Type Description Output supply pins. Connect to 1.8V. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. Negative supply pins. Connect to ground. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. Positive supply pins. Connect to 3.3V. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. Pulldown Non inver ting differential clock input. Pullup Inver ting differential clock input. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels. Differential output pair. LVHSTL interface levels.
TABLE 1. PIN DESCRIPTIONS
Number 1, 11, 14, 24, 25, 35, 38, 48 2, 3 4, 5 6, 19, 30, 43 7, 8 9, 10 12, 13 15, 16 17, 18 20, 21 22, 23 26, 27 28, 29 36 37 39, 40 41, 42 44, 45 46, 47 Name VCCO Q11, nQ11 Q10, nQ10 VEE Q9, nQ9 Q8, nQ8 VCC Q7, nQ7 Q6, nQ6 Q5, nQ5 Q4, nQ4 Q3, nQ3 Q2, nQ2 CLK nCLK Q15, nQ15 Q14, nQ14 Q13, nQ13 Q12, nQ12 Power Output Output Power Output Output Power Output Output Output Output Output Output Input Input Output Output Output Output
NOTE: Pullup and Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
ICS8520DY
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REV. B JULY 5, 2001
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS8520
LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER
Test Conditions CLK, nCLK 51 51 Minimum Typical Maximum 4 Units pF K K
TABLE 2. PIN CHARACTERISTICS
Symbol CIN RPULLUP RPULLDOWN Parameter Input Capacitance Input Pullup Resistor Input Pulldown Resistor
TABLE 3. FUNCTION TABLE
Inputs CLK 0 1 0 1 Biased; NOTE 1 nCLK 1 0 Biased; NOTE 1 Biased; NOTE 1 0 LOW HIGH LOW HIGH HIGH Outputs Q0 thru Q15 nQ0 thru nQ15 HIGH LOW HIGH LOW LOW Input to Output Mode Differential to Differential Differential to Differential Single Ended to Differential Single Ended to Differential Single Ended to Differential Polarity Non Inver ting Non Inver ting Non Inver ting Non Inver ting Inver ting
Biased; NOTE 1 1 LOW HIGH Single Ended to Differential Inver ting NOTE 1: Single ended use requires that one of the differential inputs be biased. The voltage at the biased input sets the switch point for the single ended input. For LVCMOS and LVTTL levels the recommended input bias network is a resistor to VCC, a resistor of equal value to ground and a 0.1F capacitor from the input to ground. The resulting switch point is approximately VCC/2 300mV.
ICS8520DY
www.icst.com/products/hiperclocks.html 3
REV. B JULY 5, 2001
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS8520
LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER
4.6V -0.5V to VCC+0.5 V -0.5V to VCC+0.5V 46C/W (no air flow) -65C to 150C
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, VCCx Inputs, VI Outputs, VO Package Thermal Impedance, JA Storage Temperature, TSTG
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
TABLE 4A. POWER SUPPLY DC CHARACTERISTICS, VCC = 3.3V5%, VCCO = 1.8V0.2V, TA = 0C TO 70C
Symbol VCC VCCO IEE Parameter Positive Supply Voltage Output Supply Voltage Power Supply Current Test Conditions Minimum 3.135 1.6 Typical 3.3 1.8 Maximum 3.465 2.0 120 Units V V mA
TABLE 4B. DIFFERENTIAL DC CHARACTERISTICS, VCC = 3.3V5%, VCCO = 1.8V0.2V, TA = 0C TO 70C
Symbol IIH IIL VPP Parameter Input High Current Input Low Current CLK nCLK CLK nCLK Test Conditions VIN = VCC = 3.465V VIN = VCC = 3.465V VIN = 0V, VCC = 3.465V VIN = 0V, VCC = 3.465V -1 -150 1.3 VCC - 0.85 Minimum Typical Maximum 150 1 Units A A A A V V
Peak-to-Peak Input Voltage 0.15 Common Mode Voltage Range; VCMR VEE + 0.5 NOTE 1, 2 NOTE 1: Common mode voltage is defined as VIH. NOTE 2: For single ended applications, the maximum input voltage for CLK, nCLK is VCC + 0.3V.
TABLE 4C. LVHSTL DC CHARACTERISTICS, VCC = 3.3V5%, VCCO = 1.8V0.2V, TA = 0C TO 70C
Symbol Parameter Test Conditions Output VOH High Voltage; NOTE 1 Output VOL Low Voltage; NOTE 1 Output VOX Crossover Voltage NOTE 1:Outputs terminated with 50 to ground. Minimum 1.0 Typical Maximum 1.2 Units V
0 40% x (VOH - VOL) + VOL
0.4 60% x (VOH - VOL) + VOL
V V
ICS8520DY
www.icst.com/products/hiperclocks.html 4
REV. B JULY 5, 2001
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS8520
LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER
Test Conditions 0 < f 250MHz Minimum 1 Typical Maximum 500 1.6 50 Units MHz ns ps
TABLE 5. AC CHARACTERISTICS, VCC = 3.3V5%, VCCO = 1.8V0.2V, TA = 0C TO 70C
Symbol fMAX tPD tsk(o) Parameter Maximum Input Frequency Propagation Delay, Low-to-High; NOTE 1 Output Skew; NOTE 2, 4
tsk(pp) Par t-to-Par t Skew; NOTE 3, 4 250 ps tR Output Rise Time 20% to 80% @ 50MHz 300 700 ps tF Output Fall Time 20% to 80% @ 50MHz 300 700 ps odc Output Duty Cycle 47 53 % All parameters measured at 250MHz unless noted otherwise NOTE 1: Measured from the differential input crossing point to the differential ouput crossing point. NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the output differential cross points. NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages and with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential cross points. NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
ICS8520DY
www.icst.com/products/hiperclocks.html 5
REV. B JULY 5, 2001
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS8520
LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER
FIGURE 1A, 1B, 1C - INPUT CLOCK WAVEFORMS
VCC
CLK
VPP
CROSS POINTS VCMR
nCLK
GND
FIGURE 1A - LVDS, HSTL, SSTL DIFFERENTIAL INPUT LEVELS
VCC
CLK
VPP
CROSS POINTS
VCMR
nCLK
GND
FIGURE 1B - LVPECL DIFFERENTIAL INPUT LEVEL
VCC CLK or nCLK GND
FIGURE 1C- LVCMOS AND LVTTL SINGLE ENDED INPUT LEVEL
ICS8520DY
www.icst.com/products/hiperclocks.html 6
REV. B JULY 5, 2001
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS8520
LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER
PACKAGE OUTLINE - Y SUFFIX
TABLE 6. PACKAGE DIMENSIONS
JEDEC VARIATION ALL DIMENSIONS IN MILLIMETERS SYMBOL N A A1 A2 b c D D1 D2 E E1 E2 e L q ccc 0.45 0 --0.05 1.35 0.17 0.09 BBC MINIMUM NOMINAL 48 --1.40 0.22 -9.00 BASIC 7.00 BASIC 5.50 Ref. 9.00 BASIC 7.00 BASIC 5.50 Ref. 0.50 BASIC 0.60 --0.75 7 0.08 1.60 0.15 1.45 0.27 0.20 MAXIMUM
Reference Document: JEDEC Publication 95, MS-026
ICS8520DY
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REV. B JULY 5, 2001
PRELIMINARY
Integrated Circuit Systems, Inc.
ICS8520
LOW SKEW, 1-TO-16 DIFFERENTIAL-TO-3.3V LVHSTL FANOUT BUFFER
Marking ICS8520DY ICS8520DY Package 48 Lead LQFP 48 Lead LQFP on Tape and Reel Count 250 per tray 1000 Temperature 0C to 70C 0C to 70C
ORDERING INFORMATION
Part/Order Number ICS8520DY ICS8520DYT
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. ICS8520DY
www.icst.com/products/hiperclocks.html 8
REV. B JULY 5, 2001

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